FPGAWorkshopNick - Revision history

ITechGeek at 17:06, 3 April 2012

2012-04-03T17:06:54Z

← Older revision		Revision as of 17:06, 3 April 2012
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			[[Category:FPGAWorkshop]]

	'''Video scaler with VGA output'''		'''Video scaler with VGA output'''

72.196.199.60 at 01:22, 14 January 2010

2010-01-14T01:22:03Z

← Older revision		Revision as of 01:22, 14 January 2010
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	1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA. ~~(DONE)~~		1: (COMPLETED) Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA.

	3: Create a framebuffer in Block RAM or the devboard's SRAM.		3: Create a framebuffer in Block RAM or the devboard's SRAM.

72.196.199.60 at 01:21, 14 January 2010

2010-01-14T01:21:27Z

← Older revision		Revision as of 01:21, 14 January 2010
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	1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA. (DONE)		1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA. (DONE)

	2: ~~Add~~ a ~~24-bit color gradient to~~ the ~~test pattern with the addition of a THS8134B video DAC on the output~~.		3: Create a framebuffer in Block RAM or the devboard's SRAM.

	3: ~~Create~~ a ~~dual framebuffer in the devboard's SRAM~~.		4: Use the framebuffer to window low resolution (<640x480) digital video input within a 640x480 output frame (no scaling).

	4: ~~Use~~ the ~~framebuffer~~ to ~~display low~~ resolution ~~(<640x480) 24-bit digital video input within a 640x480 output frame without scaling~~.		5: Attempt to implement scaling algorithms to scale the input resolution to fill the full frame of the output resolution.

	5: ~~Attempt~~ to ~~implement scaling algorithms to scale~~ the ~~input resolution to fill~~ the ~~full frame~~ of ~~the output resolution~~.		6: Add 24-bit color depth to the output with the addition of a THS8134B video DAC.


	If I can manage to get this far, I will add additional objectives.		If I can manage to get this far, I will add additional objectives.

72.196.199.60 at 01:17, 14 January 2010

2010-01-14T01:17:52Z

← Older revision		Revision as of 01:17, 14 January 2010
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	If I can manage to get this far, I will add additional objectives~~. Eventually I would like to build a deinterlacer/scaler for interlaced RGB video~~.		If I can manage to get this far, I will add additional objectives.

72.196.199.60 at 01:17, 14 January 2010

2010-01-14T01:17:04Z

← Older revision		Revision as of 01:17, 14 January 2010
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	1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA.		1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA. (DONE)

	2: Add a 24-bit color gradient to the test pattern with the addition of a THS8134B video DAC on the output.		2: Add a 24-bit color gradient to the test pattern with the addition of a THS8134B video DAC on the output.

72.196.199.60 at 01:49, 18 December 2009

2009-12-18T01:49:45Z

← Older revision		Revision as of 01:49, 18 December 2009
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	Video scaler with VGA output		'''Video scaler with VGA output'''

	To start off simple, the ~~design will implement~~ a ~~dual frame buffer~~ to ~~display~~ a ~~lower resolution~~ video ~~image within~~ a ~~higher~~ resolution ~~output frame without scaling. The input video signal will be~~ <640x480 24-bit digital ~~RGB, and the~~ output ~~will be 640x480 analog RGB~~. ~~If this works out, then different~~ scaling algorithms ~~can be implemented~~ to scale the input resolution to fill the full frame of the output resolution. ~~The idea is~~ to add ~~complexity to the code and input/output circuitry incrementally, eventually~~ I would like to ~~make~~ a deinterlacer/scaler for interlaced ~~analog~~ RGB video.		To reduce the high likelihood of this project ending in undebuggable disaster, I plan to start off with simple goals and add complexity to the code and input/output circuitry incrementally.


			1: Generate a simple 640x480 VGA test pattern with all timing and sync signals controlled by the FPGA.

			2: Add a 24-bit color gradient to the test pattern with the addition of a THS8134B video DAC on the output.

			3: Create a dual framebuffer in the devboard's SRAM.

			4: Use the framebuffer to display low resolution (<640x480) 24-bit digital video input within a 640x480 output frame without scaling.

			5: Attempt to implement scaling algorithms to scale the input resolution to fill the full frame of the output resolution.


			If I can manage to get this far, I will add additional objectives. Eventually I would like to build a deinterlacer/scaler for interlaced RGB video.

70.168.131.77: Created page with 'Video scaler with VGA output To start off simple, the design will implement a dual frame buffer to display a lower resolution video image within a higher resolution output frame…'

2009-12-15T18:41:10Z

Created page with 'Video scaler with VGA output To start off simple, the design will implement a dual frame buffer to display a lower resolution video image within a higher resolution output frame…'

New page

Video scaler with VGA output

To start off simple, the design will implement a dual frame buffer to display a lower resolution video image within a higher resolution output frame without scaling. The input video signal will be <640x480 24-bit digital RGB, and the output will be 640x480 analog RGB. If this works out, then different scaling algorithms can be implemented to scale the input resolution to fill the full frame of the output resolution. The idea is to add complexity to the code and input/output circuitry incrementally, eventually I would like to make a deinterlacer/scaler for interlaced analog RGB video.