HacDC Wiki - User contributions [en]

FPGAWorkshopDLotts

2010-02-28T06:39:09Z

DLotts: The sloppy redundant full feedback approach to physical computing

Currently I only have some meta ideas:

I'd like to do something that:

- can't be done using microcontrollers.

- that I can complete

----
I thought I'd share another meta-idea that might lend itself FPGA programming. I have to come up with a practical application, to test out these ideas, but I need help working out an issue, described at the bottom of this.

This idea follows what I call the "sailing philosophy", that is: meet requirements using the wind that you get, even if you have to zigzag, and NOT getting all silly about controlling the wind and rest of the environment.

This may also be an example of the [http://en.wikipedia.org/wiki/Worse_is_better "Worse is better"] philosophy.

== The sloppy redundant full feedback approach to physical computing ==
-or-
== The Cloud Computing approach to Managing Sensors ==

Abstract: Physical computing, robotics, and mechatronics suffer from a mapping problem, a mechanical complexity problem, and a configuration management problem. These problems can be solved by creating and using clumps of cheap sensors, attached using modern adhesive materials and connecting their output wires randomly to the input of the computer controller. Then, requiring the designer to set a sensor clump for every movement, the controller can manage it's own configuration automatically.

Sensor mounting: Wrap-on, spray on, glue on. Must work without perfect positioning and without careful mounting of screws and mounting plates -- none of that. It should be like putting on a band aid, a bandanna, or peeling a Bannana. :^) It should be a blob of clay with wires that you push into the correct spot for sensing. (Epoxy putty and two part silicone come to mind.) Or perhaps like a strip of adhesive tape or Velcro(TM) that you wrap around or along a moving joint.

Sensor clumps: Sensors must be a bunch of more or less redundant wired outputs that sense different portions of where they are mounted. For example, an array of light sensors, each positioned and pointed randomly and distributed. For another example, conductors thinly separated, changing resistance, distributed around something that moves, or capacitive around gaps, or hall affect around moving metal. Each sensor is actually a bundle of cheap sensors, maybe thirty or a hundred tiny points of electronics that change electrical output in response to a change in the environment.

Connecting the sensors: Should be a bundle of wires, perhaps a ribbon cable, that makes it's way to each sensor. The mapping of the wires to the input on the controller MUST be inconsequential. Figuring out which wire goes to which sensor is a responsibility of the system, NOT human that connects them. The wires get bundled together randomly and connected regardless of what they sense, or even if they are not connected.

Actuators: Motors, piston cylinders, lights, heaters, anything that moves, emits radiation, or otherwise changes a physical state MUST have a sensor clump mounted on or with it. This is practical because sensors are easy to apply and cheap -- see sensor clumps, and sensor mounts.

Controller initialization: When the controller is powered on it must go through a series of movements whereby it changes an actuator and records which sensors are relevant to each movement and what scale . This way it can set up feedback loops from the control output to the sensor feedback. This is similar to what I imagine infants do, as they move randomly and map the sensations produced. It can store this mapping of actuator to sensor in non-volitale memory for next power up, perhaps use it as a hint, so that the initialization can be much faster and requires only a small movement.

Limit sensing 1: Limit sensing must be done carefully since driving a motor past it's range of motion can damage the structure or the actuator. One idea perhaps to designated some sensors that report a bad state and other sensors that can predict the bad state. For example, a position sensor and a limit switch to indicate a bad state, or a temperature sensor that can be calibrated to predict an over-heating sensor. The bad state sensor must be manually calibrated, or positioned at the limit manually. I don't know how the controller would determine which is the bad state sensor. Perhaps it could be first initialized with all bad state sensors in their good state, then record that for the life of the device.

Limit sensing 2: Another idea for limit sensing is the designer could associate particular actuators as having limits, so that during initiation it will search for it's limits by oscillating in small increments, progressing slowly in one direction, until it senses feedback with the same frequency as it's oscillation, and then do the same in the other direction.

The blocking challenge: Another issue with this approach that I have to solve before I start is that of analog to digital. A wide variety of analog inputs with unpredictable ranges need to be connected to a large number of digital inputs. I'm hoping some simple thresholding with comparators or similar can allow easily connecting to digital inputs. I guess an analog multiplexer connected to an ADC might do the trick. Then I just need 8 or 16 bits to connect the signal input to the controller, and address bits that select a sensor's wire, maybe another few IO pins to control a gain amplifier for sensors with weak signals.

I had hoped that FPGA's had more analog features at their inputs, but they seem black and white. This is the part that I haven't yet figured out. Please help!
--[[User:DLotts|DLotts]] 06:39, 28 February 2010 (UTC)

FPGAWorkshopDLotts

2009-12-17T02:59:41Z

DLotts:

Currently I only have a meta idea:

I'd like to do something that
- can't be done using microcontrollers.
- that I can complete

FPGAWorkshopDLotts

2009-12-17T02:36:46Z

DLotts: Created page with 'Currently I only have a meta idea: I'd like to do something that can't be done using microcontrollers.'

Currently I only have a meta idea:

I'd like to do something that can't be done using microcontrollers.

FPGA Workshop

2009-12-17T02:30:00Z

DLotts: Added my project to FPGA Workshop Projects

== Main Topics ==
1) Introduction to digital logic & design 
2) Verilog HDL modeling & testing 
3) FPGA's & using them. 
 
We will be taking an approach of reviewing & learning digital design, implementing designs and methods of formally simulating and verifying designs before moving into [http://en.wikipedia.org/wiki/Field-programmable_gate_array FPGA] oriented work. This workshop will be more engineering oriented than hobbyist/tinkerer oriented.

== Hardware ==
We'll be covering some FPGA specific topics and projects using real hardware. The first half of the workshop will cover logic design, implementation and testing. This will allow people to put off ordering any hardware until they know that they actually want to pursue FPGA development, since the dev board I've chosen for this is not cheap but I feel is robust enough to be a good starting board for this group.
 
The hardware we'll be using is the Xilinx Spartan 3AN development kit. This kit is available from a few vendors for 199USD + shipping. This will be discussed more later on. The kit includes programming cable, and evaluation copies of some of the Xilinx tools."

== Tools ==

=== Verilog Simulation and Waveform Viewing ===
Icarus verilog & gtkwave; for doing Verilog compilation, simulation and waveform viewing. A makefile has been made to simplify the flow for any exercises and projects we use these tools with. That makefile can be found [[iverilogmakefile|'''here''']]. Instructions for installing these programs on Mac osX and Ubuntu can be found here: [[FOSS_Verilog_tool_installation | '''FOSS Verilog tool installation''']] 
=== FPGA Toolchain ===
After we finish up with covering Verilog modeling, we'll move to the Xilinx ISE Webpack tools and actual work with FPGAs. This software is available from Xilinx for free, and is available for Windows and Linux platforms. This will be used for Verilog compilation, simulation, synthesis of designs, design mapping, place and routing of designs, bitstream generation and board programming. Instructions for installing the Xilinx tools on the VM can be found here:[[Xilinx_ISE_Installation_Instructions | '''Xilinx ISE Installation Instructions''']] 
=== Virtual Machine ===
An OpenSuse Virtual Machine (VMWare based) will be available for people to use in this course, if they wish. This will
have the icarus verilog tools and GTKwave loaded on it, along with Firefox, gcc and make. The suseStudio team has encouraged the use of their VMs in such a manner (teaching workshops). This is being built in susestudio, and will be available as a live install as well.
 
When we move over to the Xilinx tools, people will have to download and install the Xilinx tools by themselves, since that material is copyrighted. Instructions will be given for doing that.

The VMware VM image is ready (ver 0.5.2) for people to grab if they wish. [http://susestudio.com/download/d931a0f28972e3505eacf8d0bad28fc0/Digital_Design__FPGA_Workshop_VM_v4.i686-0.5.2.vmx.tar.gz '''Get it here.''']

The image also works with VirtualBox. Create a new machine, and when it asks you for a hard drive, select use an existing drive. This takes you to the hard-drives list dialog box. From there, file..create a new drive, link it to the .vmdk file, select it, and you're all set. For the rest, all defaults are ok. (Bother Elliot for hints with VBox.)

There are a few items of note regarding the VM 
* Download is approximately 350MB, the tarball is about 1.5GB in size, and the virtual disk will expand up to 20gigs dynamically.
* The download link is a virgin, freshly built VM, so you'll be the first user booting it up since build.
* There are two users, root and workshop. Both have the password 'linux'
* For the user workshop, ~/scripts/ is included in their $PATH
* Also, user workshop has a few small files in ~/resources/ including a simple upcounter design example.
* May need to run the network configuration tools to ensure you get functional networking. I've experienced issues with the VM in suspend mode, switching networks on the host machine, and completely loosing network on the VM until rerunning the network config tools. They can be found poking around in the system settings for yast.
* Currently, the Xilinx Cable Drivers aren't building on the VM (but all the other Xilinx tools work). If someone is a linux guru and wants to try to make it work, contact me at [mailto:teachmeFPGA@gmail.com teachmeFPGA@gmail.com]. My next attempt is to turn the vm into a live-install and try building the cable drivers on real hardware instead of a VM.
* After loading the Xilinx settings (which will be covered in more detail when those tools are introduced), the current shell can no longer run icarus verilog flows. Start a new shell in order to run icarus verilog.
* Its a fairly minimalist system, with the FOSS tools listed above load, along with firefox, gcc and nano. Use yast or yast2 in order to install any additional packages. example yast2 --install ''packname''
* If the download link stops working, the build has likely expired on the SuseStudio server. Please email [mailto:teachmeFPGA@gmail.com teachmeFPGA@gmail.com] if the download link no longer works.
* Mad props to the susestudio team for making this possible

== Lecture ==
Lecture/Discussions will mainly be based on content from a pair of courses in MIT's Opencourseware initiative. This content is licensed on the Creative Commons Attribution NonCommercial Share-alike 3.0 license; as a result, the electronic content generated by the workshop will also need to be made available under the same license. This will allow people to freely access just the discussion slides without watching through videos. A video archive will be made available for those unable to attend.

=== List of Lectures ===
''This is currently an incomplete list, additional topics will be added as I solidify them - wgibb''
{| border="1"
|Week
|Date
|Topics Covered
|Exercise
|Solutions/Approach
|-
|1
|October 7th, 2009
|[http://wiki.hacdc.org/index.php/File:Lect1_draft2.pdf Workshop Introduction & Introduction to digital systems and design]
|Make sure people can run the Virtual Machine or FOSS tools
|Lorem Ipsum
|-
|2
|October 14th, 2009
|[http://wiki.hacdc.org/index.php/File:Lect2_draf3.pdf Boolean Logic, combinatorial circuits and timing]
|Make sure people can run the Virtual Machine or FOSS tools |[http://wiki.hacdc.org/index.php/File:Lect2_exercise.pdf Boolean & Combinatorial Exercises]
|[http://wiki.hacdc.org/index.php/File:Lect2_sol.pdf Exercise Solutions]
[[Discussion 2 Exercises Solution notes]]
|-
|3
|October 21st, 2009
|[http://wiki.hacdc.org/index.php/File:Lect3.pdf Introduction to Verilog Coding, focusing on combinatorial circuits]
|[[FPGAExercise3| Verilog Coding Modular Full Adder Design and Simulation and ALU extension project]]
|Solutions
|-
|4
|October 28th, 2009
|Make up day
|
|Solutions
|-
|4 1/2
|November 4th, 2009
|[http://wiki.hacdc.org/index.php/File:Intro_to_Sequential_Logic.pdf Introduction to Sequential Logic and Flip Flops]
|[http://projects.hacdc.org/tapemachine/SequentialCircuits.mp3 Audio]
| Placeholder
|-
|5
|November 11th, 2009
|No class meeting with Will
|[[FPGAExercise5|Different adder construction, shift register and LFSR construction]]
|[[FPGAExercise5code|4 bit counter code from group hacking session]]
|-
|6
|November 18th, 2009
|[http://wiki.hacdc.org/index.php/File:FPGAWeek6.pdf DFFs round 2, Testbenches]
[[FPGAWeek6Followup|Notes on the use of Define statements, tasks and events]]
|Shift Register & LFSR examples from week 5
|[[FPGAExercise6code|Shift Register, SR Testbench, LFSR, LFSR Testbench]]
|-
|7
|November 25th, 2009
|[[Xilinx_ISE_Installation_Instructions|Xilinx tool install party]]
|[[FPGA_Workshop#Xilinx_Links| Xilinx ISE In-Depth Tutorial]]
|See Tutorial
|-
|8
|December 2nd, 2009
|
[http://wiki.hacdc.org/index.php/File:Week8_fsm_notes.pdf Finite State Machines] 
[http://wiki.hacdc.org/index.php/File:Week8_clocking_notes.pdf Clocking Notes]
|Vending Machine Simulation from notes
|[[FPGAExercise8code|FSM level-to-pulse converter, testbench]]
|-
|9
|December 9th, 2009
|We talked about stuff
|[http://wiki.hacdc.org/index.php?title=FPGA_Workshop#FPGA_Workshop_Projects People start posting project ideas]
|[http://www.google.com/search?q=fpga+project+ideas Solutions]
|-
|10
|December 16th, 2009
|[http://wiki.hacdc.org/index.php/File:Week10_programmable_fabric.pdf Introduction to FPGAs - History, Capabilities and Features]
|Exploring designs and FPGA tools
|Solutions
|-
|10
|December 16th, 2009
|TBD
|TBD
|TBD
|}
 

=== Videos of Discussions ===
The videos are mpeg4 video with aac audio 
{| border="1"
| Week
| Video Links
| Notes
|-
|1
|
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV011.TOD.ff.mp4 Part 1]
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV012.TOD.ff.mp4 Part 2]
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV013.TOD.ff.mp4 Part 3]
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV014.TOD.ff.mp4 Part 4] 
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV015.TOD.ff.mp4 Part 5]
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV016.TOD.ff.mp4 Part 6]
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV017.TOD.ff.mp4 Part 7]
[http://wiki.hacdc.org/videos/hacdc-fpga/week01/MOV018.TOD.ff.mp4 Part 8]
|not equal length
|-
|2
|
[http://wiki.hacdc.org/videos/hacdc-fpga/week02/MOV005.TOD.ff.mp4 Part 1]
[http://wiki.hacdc.org/videos/hacdc-fpga/week02/MOV006.TOD.ff.mp4 Part 2]
[http://wiki.hacdc.org/videos/hacdc-fpga/week02/MOV007.TOD.ff.mp4 Part 3] 
[http://wiki.hacdc.org/videos/hacdc-fpga/week02/MOV008.TOD.ff.mp4 Part 4]
[http://wiki.hacdc.org/videos/hacdc-fpga/week02/MOV009.TOD.ff.mp4 Part 5]
| Video cuts out at a discussion about Rise and Fall times
|-
|3
|
[http://wiki.hacdc.org/videos/hacdc-fpga/week03/10.avi Part 1]
[http://wiki.hacdc.org/videos/hacdc-fpga/week03/11.avi Part 2]
[http://wiki.hacdc.org/videos/hacdc-fpga/week03/12.avi Part 3] 
[http://wiki.hacdc.org/videos/hacdc-fpga/week03/13.avi Part 4]
[http://wiki.hacdc.org/videos/hacdc-fpga/week03/14.avi Part 5]
|
|-
|4
|
|
|}

== Workshop requirements ==

This workshop will be free of charge to attend, but there are additional needs in order to fully benefit from attending the workshop.
* Open mind to learning
* Willingness to read documentation, as the capacity for independent research is important for doing hardware design.
* Willingness to commit time over this fall
* Either ability to run a VMWare virtual machine, the ability to convert the VM for virtualBox, or ability to install the icarus verilog/gtkwave tools on your own. This will likely necessitate a laptop of some sort.
* Xilinx.com account, for licensing Xilinx tools and IP.
* Hardware will NOT be required at the beginning of the course but will be needed later on to run exercises and to do any interesting projects

== Workshop Frequently Asked Questions ==

# What operating systems will the FPGA toolchain be available on?
##The Xilinx ISE Webpack is supported on Windows XP Pro, Windows Vista Business, Redhat Linux and Suse Linux Enterprise. For a detailed list of official OS support, check out the [http://www.xilinx.com/ise/ossupport/index.htm Operating system support page on Xilinx.com]. The tools will run on openSuse as well. Feel free to try other linux distros and post your results.
# What is the cost of the FPGA development board we'll be using?
##The retail cost of the development board is typically around 199-220 USD, plus shipping, from a few different vendors. Links for that are [[FPGA_Workshop#Spartan_3AN_Starter_Kit|here]].
# Will there be homework?
##Since this isn't an academic course, there will not be graded homework in the traditional sense. I'll be choosing a few additional exercises that people can do outside of the workshop each week, if they wish, that will further help hone their skills.
# Will there be extensive C/C++ coding?
##C experience is not a prerequisite for this workshop. There will not be any C/C++ coding involved in the workshop directly. There is one project that I've got in mind that may be of interest to people that are proficient in C/C++ and pick up hardware design rather well.

== Workshop Mailing List ==

A HacDC Mailman mailling list has been setup for this workshop. That list is fpga@hacdc.org. You can subscribe to that list by sending an email to fpga-request@hacdc.org with the subject line "subscribe" or click the mailto link [mailto:fpga-request@hacdc.org?Subject=subscribe fpga-request@hacdc.org?Subject=subscribe] and let your email application handle it...

== Workshop Instructor ==

William Gibb, mad scientist. For contacting him regarding the workshop, please email [mailto:teachmeFPGA@gmail.com teachmeFPGA@gmail.com].

== References ==
=== Grateful Dead Trees Reference ===
Fundamentals of Digital Logic with Verilog Design by Brown and Vranesic 
Verilog Quickstart: A Practical Guide to Simulation and Synthesis in Verilog by Lee 
FPGA Prototyping using Verilog Examples by Chu. 
These texts will not be required for the course, but are very good launching points for the topics that we are covering.

=== Online References ===

==== General Resources ====
[http://www.opencircuitdesign.com/ Open Circuit Design] Open Source design tools 
[http://www.doulos.com/knowhow/ Doulos Digital Design Resources] Good learning and design references 
[http://www.asic-world.com/ '''ASIC World'''] Good learning references 
[http://www.play-hookey.com/digital/ Play Hookey Digital Design] Good learning references 
[http://www.fpga4fun.com/ '''FPGA4Fun''] Lots of available IP 
[http://academic.csuohio.edu/chu_p/rtl/fpga_vlog.html Companion website for Professor Pong Chu's Verilog Book] 
[http://www.opencores.org '''OpenCores'''] Very good repository for IP. Also the home to the OpenRISC System on Chip project 
[http://hdlplanet.tripod.com/verilog/verilog-manual.html#RTFToC0 Bucknell Handbook on Verilog HDL] (Martin found this) Old but useful? 
[http://verilog.openhpsdr.org/ KD7IRS's Verilog - OpenHPSDR - Lectures] Webcast style class, with lab 

==== FPGA Vendors ====
[http://www.xilinx.com/ Xilinx] 
[http://www.altera.com/ Altera] 
[http://www.actel.com/ Actel] 
[http://www.atmel.com/products/fpga/ Atmel FPGA] 
[http://www.siliconbluetech.com/ Silicon Blue] 
[http://www.latticesemi.com/ Lattice Semiconductor] 
[http://www.achronix.com/ Achronix] 

==== Course Resources ====
[http://www.icarus.com/eda/verilog/ Icaurus Verilog] 
[http://gtkwave.sourceforge.net/ GTKWave] 
[http://www.vmware.com/products/player/ VMware Player - Free download for Windows and Linux] 
[http://www.susestudio.com SUSE Studio] SLED/OpenSUSE build service. Make VMs, live installs, all customized 

==== Xilinx Links ====
[http://www.xilinx.com/support/techsup/tutorials/ Xilinx Tutorials] 
[http://www.xilinx.com/support/techsup/tutorials/tutorials10.htm Xilinx ISE 10.1 Tutorial and files] 
[http://www.xilinx.com/direct/ise10_tutorials/ise10tut.pdf ISE 10.1 In Depth Tutorial Direct link to PDF] 
[http://www.xilinx.com/support/documentation/index.htm Xilinx Documentation] This includes device data sheets, user guides, IP documentation and Xilinx software manuals 
[http://www.xilinx.com/tools/designtools.htm Xilinx Design Tools] Xilnx Software tools can be found here 
[http://www.xilinx.com/products/devkits/HW-SPAR3E-SK-US-G.htm Spatan 3E Starter Kit] Site for the Spartan 3E kit 
[http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm Spartan 3AN Starter Kit] Site for the Spartan 3AN kit 
[http://www.xilinx.com/support/training/free-courses.htm Free Video Training courses] Name says it all 

==== Spartan 3AN Starter Kit ====
[http://www.xilinx.com/products/devkits/HW-SPAR3AN-SK-UNI-G.htm Spartan 3AN Starter Kit] 
[http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D45129%2526CCD%253DUSA%2526SID%253D32214%2526DID%253DDF2%2526LID%253D32232%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html AVNet Spartan 3AN Starter Kit sales page] 
[http://www.nuhorizons.com/ NuHorizons - Xilinx Vendor] Do a search for HW-SPAR3AN-SK-UNI-G 
[http://search.digikey.com/scripts/DkSearch/dksus.dll?Cat=2621773&k=spartan%203an Digi-key Spartan 3AN Starter Kit Sales page] 
Probably also at other [[suppliers]].

===== Group Order Participants =====
NOTE: Xilinx has donated 15 spartan3 boards, which should arrive before 12/7

* Daniel (obscurite on #hacdc on freenode)
* Alden
* Dan Barlow
* Navid
* Matt Liggett
* Maitland Bottoms
* Ben Peizik (benparse@yahoo.com)
* Martin
* Rob Seastrom (rs@seastrom.com)
* Phillip Stewart
* Tim F (smilemoose@gmail.com)
* Nick
* Brian

* Elliot
* Justin

==== MIT OpenCourseWare links ====
[http://ocw.mit.edu/OcwWeb/web/terms/terms/index.htm MIT OCW Terms of Use] 
[http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/6-004Computation-StructuresFall2002/CourseHome/index.htm OCW site for 6.004 - Computation Structures] 
[http://ocw.mit.edu/OcwWeb/Electrical-Engineering-and-Computer-Science/6-111Spring-2006/CourseHome/index.htm OCW site for 6.111 Introductory Digital Systems, 2006] 

== FPGA Workshop Projects ==
List of FPGA projects people are working on at HacDC

{|border="1"
|Person
|Project
|-
|William Gibb
|[http://opencores.org/project,spi_core_dsp_s3ean_kits AD/DA controller for Spartan 3E/3A/3AN Development Kits]
|-
|Daniel (obscurite on #hacdc on freenode)
| [[FPGAWorkshopDaniel |Daniel's Project (Game of Life w/ Martin & Breakout VGA/LED?)]]
|-
|Alden
| [[FPGAWorkshopAlden | Alden's Project]]
|-
|Dan Barlow
| [[FPGAWorkshopBarlow | Barlows's Project]]
|-
|Navid
| [[FPGAWorkshopNavid | Navid's Project]]
|-
|Matt Liggett
| [[FPGAWorkshopMatt | Matt's Project]]
|-
|Maitland Bottoms
| [[FPGAWorkshopMaitlan | Maitland's Project]]
|-
|Ben Peizik (benparse@yahoo.com)
| [[FPGAWorkshopBen | Ben's Project]]
|-
|Martin
| [[FPGAWorkshopMartin | Martin's Project]]
|-
|Rob Seastrom (rs@seastrom.com)
| [[FPGAWorkshopJustin | Justin's Project]]
|-
|Phillip Stewart
| [[FPGAWorkshopPhillip | Phillip's Project]]
|-
|Tim F (smilemoose@gmail.com)
|[[FPGAWorkshopJustin | Tims Project]]
|-
|Nick
|[[FPGAWorkshopNick | Nick's Project]]
|-
|Brian
|[[FPGAWorkshopBrian | PROM Burner/Reader]]
|-
|Elliot
|[[FPGAWorkshopElliot | Elliots's Project]]
|-
|Justin
|[[FPGAWorkshopJustin | Justin's Project]]
|-
|Arc
|[[FPGAWorkshopArc | Arcs SMT oven ]]
|-
|Davel (DLotts)
|[[FPGAWorkshopDLotts | Davel's Project]]
|}

[[Category:Classes]]
[[Category:FPGAWorkshop]]

Category:What I Stole

2009-10-29T08:41:32Z

DLotts: added A230

<h2>Items Borrowed from the HacDC Space</h2>
(Linked to from [[Items Borrowed from the HacDC Space]] for indexing purposes.)

August 7, 2008 - [[User:Ben|Ben]] 
- Beginning Electronics book

June 19, 2008 - Tim Ball (timball@tux.org) / Richard Bewley (rbewley@gmail.com) - Not Returned / Outstanding 
- 1x Lineman's handset

June 30, 2008 - Q (andrew@i11industries.com) - 
- 1x Digital Multimeter (Yellow) 

July 25, 2008 - Q (andrew@i11industries.com) - 
 Nov 13, 2008 Mac G4 usb keyboards (x2) - member28 

June 1, 2008 - Tino (oberoc@yahoo.com) - 
Small Form Factor PCs book 

December 22, 2008 - [[User:Myself|Nate]] - 
JC Penney component stereo cassette deck 

January 13, 2009 - Derek Cooper - 
- CEN-TECH Digital Multimeter (red) Item#90899 

June 2, 2009 - Derek Cooper - 
- Infrared night vision goggles 

June 2, 2009 - David Lotts - 
- Infrared night vision goggles (EyeClops) 

June 2, 2009 - [[User:Drwho|The Doctor]] - 
- Infrared night vision goggles 
'cause, you know, all the cool kids were doing it. 
I discovered that the unit I borrowed is flaky - after a few seconds of wearing it while powered up the display flickers and goes dead. I think that the cable leading from the power pack to the visor has a bad connection. When I get time I'll tear this one down and see if I can repair it. 

[[User:DLotts|DLotts]] 08:41, 29 October 2009 (UTC)

- A230 Micro Game Station with labeled problem: "Raster screen" AKA white screen of death with stripes.

<h2>Items Returned to the HacDC Space</h2>
June 15, 2008 - Tino (oberoc@yahoo.com) - 
Small Form Factor PCs book 

July 25, 2008 - Q (andrew@i11industries.com) - 
- Reflow Station

RobotFest 2009

2009-04-16T20:04:27Z

DLotts: added my plans

RobotFest 2009 is April 25, 2009 from 10 AM to 3 PM.

http://www.robotfest.com/

HacDC will have 2 tables where we will show off member projects and sell Arduinos.

So we have an idea of what to plan for, please list any projects you'd like to show off below. If you're not planning to be at RobotFest yourself, you can put your projects on the RobotFest shelf in the space (Please make sure someone who's going knows how to setup/use/display your project). We'll take everything on the shelf with us and return it to HacDC sometime on the evening of April 25.

{| border="1"
! Name !! Project !! Attending?
|-
| Ben || Something BlinkM-ey || yes
|-
| David Lotts || [http://www.johuco.com/neural/neural.html Muramator] [http://www.johuco.com/muram/muram.html kit] (maybe if it still works) || yes
|}

Also, we'll be carpooling from HacDC, leaving at 8:00 AM on Saturday morning. If you're offering a ride or need a ride, please add your name below:

{| border="1"
! Name !! Offering or Needing a ride? !! How many people?
|-
| Ben || Offering || 3
|-
| David Lotts || Offering or Riding || 4
|}

Live Status

2008-09-22T19:24:19Z

DLotts: It was open since 9/13, 9 days ago! must be wrong.

== HacDC's Live Status ==

HacDC is currently: <onlyinclude>Closed</onlyinclude>

Signed: [[User:DLotts|DLotts]] 19:24, 22 September 2008 (UTC)

=== Usage ===

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Time calculations: Subtract 4 hours to go from [http://en.wikipedia.org/wiki/Coordinated_Universal_Time UTC] to EDT (or 5 hours for EST).

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Live Status

2008-08-21T03:32:41Z

DLotts: closing now

== HacDC's Live Status ==
HacDC is currently: <onlyinclude>Closed.</onlyinclude>

Signed: [[User:DLotts|DLotts]] 03:32, 21 August 2008 (UTC)

=== Usage ===

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Live Status

2008-08-21T00:50:14Z

DLotts: open

== HacDC's Live Status ==
HacDC is currently: <onlyinclude>Open!</onlyinclude>

Contact Phone Number: 703 517 4931

Notes: David Lotts is here, come on by. I'll be here at least until 10pm.

Signed: [[User:DLotts|DLotts]] 00:50, 21 August 2008 (UTC)

=== Usage ===

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Live Status

2008-07-09T18:45:28Z

DLotts:

== HacDC's Live Status ==
HacDC is currently: <onlyinclude>open!</onlyinclude>

Status: Nate's in the space and working on stuff. Call me at 248 three seven nine 3614. [[User:Myself|Myself]] 22:35, 6 July 2008 (UTC)

David L intends to show up at around 7pm. It's rumored that Rodney will be there too. [[User:DLotts|DLotts]] 18:45, 9 July 2008 (UTC)

=== Usage ===

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Live Status

2008-06-25T22:31:35Z

DLotts:

== HacDC's Live Status ==
HacDC is currently: <onlyinclude>About to be opened!</onlyinclude>

When: Rodney and David L are leaving now and should be there at 7:15pm today. Open Lab lives on! Free coffee tonight!
Call: Area code seven oh three 517 dash 4931
(Don't leave a voice mail, I can't get it.)

Signed: [[User:DLotts|DLotts]] 22:31, 25 June 2008 (UTC)

=== Usage ===

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Live Status

2008-06-25T22:24:07Z

DLotts:

== HacDC's Live Status ==

HacDC is currently: <onlyinclude>Closed. Planned to open at 7pm...</onlyinclude>

Signed: [[Special:Contributions/216.15.42.186|216.15.42.186]] 18:53, 14 June 2008 (UTC)

Rodney and David L are leaving now and should be there at 7pm today.

[[User:DLotts|DLotts]] 22:22, 25 June 2008 (UTC)
=== Usage ===

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Live Status

2008-06-25T22:22:51Z

DLotts:

== HacDC's Live Status ==

HacDC is currently: <onlyinclude>Closed.</onlyinclude>

Signed: [[Special:Contributions/216.15.42.186|216.15.42.186]] 18:53, 14 June 2008 (UTC)

Rodney and David L are leaving now and should be there at 7pm today.

[[User:DLotts|DLotts]] 22:22, 25 June 2008 (UTC)
=== Usage ===

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User:DLotts

2008-06-25T22:20:35Z

DLotts:

== David Lotts's User Page ==

I don't think I know myself well enough to say anything. Maybe others can help.

[[Image:davidLottsOrange3.JPG]]
<pre>
//\\\\
|o o|
{ {} }
\ - /
--
</pre>
This was originally an impressive hi-res ascii art rendering of me, but I couldn't get the aspect ratio right.
All this to compensate for my not seeing how to upload images and I feeling like a noob. :-) [later: I figured it out.]

dwl.

File:DavidLottsOrange3.JPG

2008-06-25T22:18:09Z

DLotts: Photo of David Lotts full face wearing an orange shirt.

Photo of David Lotts full face wearing an orange shirt.

User:DLotts

2008-06-25T22:15:22Z

DLotts: New page: == David Lotts's User Page == I don't think I know myself well enough to say anything. Maybe others can help. Image:david.jpg <pre> //\\\\ |o o| { {} } \ - / -- </pre> This was ...

== David Lotts's User Page ==

I don't think I know myself well enough to say anything. Maybe others can help.

[[Image:david.jpg]]
<pre>
//\\\\
|o o|
{ {} }
\ - /
--
</pre>
This was originally an impressive hi-res ascii art rendering of me, but I couldn't get the aspect ratio right.
All this because I could not see how to upload images and I feel like a noob. :-)

dwl.

User talk:Bjorn

2008-06-25T20:13:59Z

DLotts:

Nice page Bjorn, love the picture. I am sure it has some cultural context that I don't know about. Is it part of your suggestion that we take our best bathroom portrait? [[User:DLotts|DLotts]]

User talk:Bjorn

2008-06-25T20:12:47Z

DLotts: C

Nice page Bjorn, love the picture. I am sure it has some cultural context that I don't know about.

Talk:HacDC Museum

2008-06-14T03:04:47Z

DLotts:

Has anyone been to the Museum of Useful things in Cambridge? Unfortunately it's now closed, but it used to be a combined store and museum, with old and interesting gadgets displayed in cases and above head level around the store. It's the first thing that came to mind when Ben proposed a HacDC museum. The Museum of Useful Things still exists online, but primarily as a store. I couldn't find much on their site about the things in their collection, but there are a few pages ([http://themut.com/exhibits/2/ Example]).

One thing that I liked about the physical store is that they often displayed old and new versions of the same product (with the new version available to buy). For example, this [http://themut.com/zoomprod/product72/ staple-free stapler] was displayed under a model that looked more like one of [http://www.officemuseum.com/stapler_gallery_stapleless.htm these guys].

:Sounds like a really interesting concept. I'd love to aim for a more expansive display of artifacts, space permitting, and if the Museum is wildly successful, perhaps its own space someday in the distant future. The idea of a store is intriguing, as well. Perhaps as HacDC grows, there could be something akin to the [http://www.826valencia.org/ 826 Valencia] model, where a fun storefront (They have a Pirate Store, a superhero store, and a Bigfoot Research Institute) is the gateway to a spectacular hacking/teaching space and proceeds are used to subsidize the programs of HacDC. We're a long way from that, but it's something to consider. [[User:Ben|Ben]] 19:10, 11 June 2008 (UTC)

== Name Controversy ==

There's been some debate about whether to name the collection after our first large benefactor, and whether to identify objects in the collection as having been donated by certain individuals. A suggestion has been made by Derek Cooper to contact the benefactor's family to verify permission to use the name, but to avoid a potentially embarrassing situation, I think it would be wise to see if the group is in favor of naming a part of the collection after the benefactor before asking for permission.

Those '''in favor''' of naming the collection after the benefactor, pending permission from his heirs
* [[User:Ben|Ben]] 15:43, 12 June 2008 (UTC)
* [[User:Q|Q]] 11:49, 12 June 2008 (EST)
* [[User:Sarah|Sarah]] 16:23, 12 June 2008 (UTC)
* [[User:Katie|Katie]] 16:49, 12 June 2008 (UTC)
* [[User:Dcooper|Dcooper]] 00:47, 13 June 2008 (UTC)
* [[User:DLotts|DLotts]] 03:04, 14 June 2008 (UTC)
Those '''opposed''' to naming the collection after the benefactor
* [[User:Bjorn|Bjorn]] 06:44, 13 June 2008 (UTC) - Anonymity was a good idea. We can have full disclosure of what is really too great a story to keep under raps. It keeps things impersonal, and I don't see what anyone has to gain from non-anonymous entanglement. Besides, I have other items I'd contribute, and I'd expect this sort of donation will become a regular occurrence - lets just keep things neutral. What Mrs. X did was very kind, but lets keep the exchange as agreed upon initially.

::I think that whenever possible, we should honor the wishes of donors (or their families, when applicable), so whatever we decide about identifying or not identifying this benefactor shouldn't determine what we do with future donations. If you were to contribute items and request anonymity, I don't see any problem with granting it. I would also disagree that removing the personal items would mean keeping a great story under wraps. We don't really have a story--we have some fun speculations about how the items in the boxes might have been used, with no way of substantiating them. While it's fun to bat around amusing theories, I personally wouldn't publicize this personal "story" even if the donor remained anonymous. [[User:Sarah|Sarah]] 11:36, 13 June 2008 (UTC)
* [[User:Myself|Myself]] 18:27, 13 June 2008 (UTC)

=== Discussion Relating to Name Controversy ===

* I think we can be selective about what we put in the "official" museum collection, but there is other interesting, amusing (embarrassing?) stuff that was in the boxes that has been photographed and put up on Flickr--and more that has yet to be photographed, no doubt. Even if it doesn't end up in the museum, it wouldn't be difficult for someone to go to HacDC's Flickr group and see the unofficial stuff mixed in with the official. Given the email from the widow, I do think it would be nice to name a collection or something after this guy, but if we do that, then I will take down my pictures of anything that I think might embarrass his family. [[User:Sarah|Sarah]] 16:23, 12 June 2008 (UTC)

* I see the collection breaking into four categories:
# Innocent, unidentifiable items: Telephones, test gear. These could be exhibited with a name, with no trouble at all.
# Innocent, identifiable items: Patent notebooks, research he was involved in. Even if partially redacted, someone who did a little digging could connect these with him. But by itself, that would do no harm.
# Risque or embarassing items: Some of these are interesting but I wouldn't want to connect them with the family name.
# Dangerous items: I won't discuss these further in a public forum.
It seems to me that any combination of 1, 2, and 3 would work, since if someone wants to do the digging and figure out who printed those fart jokes, the "damage" is minimal. It'd be better to avoid mixing 2 and 3, if we wish to play it safe in that regard. But 4 absolutely cannot appear with 2. And honestly, for our own safety, I don't think 4 should appear or be mentioned at all. If you disagree, please do so in person.
In general, I think our best course is (1 & 3), with redaction of 3 if necessary. We're under no obligation to name anything, and some stuff in 3 is really neat. If we want to pay tribute to the widow's generosity, we could do so in a way not connected with the collection. (Just list her as a donor, or something.) [[User:Myself|Myself]] 18:27, 13 June 2008 (UTC)

* We can avoid reputation/embarrassment if we simply call it the ___ ___ Museum, and then write in the "About" section that the man started our collection with a few fine pieces. We don't have to say what things came from him unless we want to. Let people assume that we got the embarrassing items from elsewhere. Also, it gives us some instant legitimacy and validity. It's a small compensation for the incorrect but popular sense of the verb "hack" that I all love and hate.

Or how about another compromise: The Patent Examiner's Collection, by HacDC.

Also, after my experience with startupDC, I don't underestimate what the Washington post is willing to feature. This could be a Post story one day. What would you like on your Post article?

Also, what would our contemporaries do? Do you think NYCResister would jump at the opportunity? Would they write an article about him with photo's? I started to Google his name the other day. There are a few tidbits, including someone that thinks that he should be shot. I'll stop there to spike your curiosity. :)

[[User:DLotts|DLotts]] 03:04, 14 June 2008 (UTC)

Live Status

2008-06-11T23:47:42Z

DLotts:

== HacDC's Live Status ==

HacDC is currently: <onlyinclude>Open!</onlyinclude>

Nate's back from Staples. Stop in! Signed: [[User:Myself|Myself]] 18:00, 11 June 2008 (UTC)

David L is on his way, estimated arrival 8:15pm EDT.

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Talk:Resource Use Policy

2008-04-28T07:50:36Z

DLotts: New page: I'm not sure where questions go, but here is something for discussion: What's the policy on members taking parts and stuff for there personal projects? On one hand it would be nice to hav...

I'm not sure where questions go, but here is something for discussion:
What's the policy on members taking parts and stuff for there personal projects? On one hand it would be nice to have shared solder and a grab bag of resisters and screws and bolts without having to bring that stuff. But on the other hand, if someone contributes valuable stuff, like a working Roomba, a handful of servo's, or a small bag of MicroPICs, are they up for grabs for anyone to put in there project and take home?
--[[User:DLotts|DLotts]] 07:50, 28 April 2008 (UTC)